In the past, various types of semiconductor devices for use as semiconductor memory devices were created to provide a semiconductor memory array or system which would incorporate these semiconductor memory devices. In the fabrication of semiconductor memory devices in order to produce a high density semiconductor memory array, it is important and critical to produce or provide each semiconductor memory device to be reliable, small, relatively easy to manufacture, and, of course, cost effective.
In the fabrication of ROM (read-only memory) type semiconductor memory arrays or systems, the technology has developed to the point where there are many different types of ROM type semiconductor memory arrays or systems. For example, a common type of a ROM type semiconductor memory array has a bit pattern formed by the use of one or more predetermined mask steps in the fabrication process.
In a semiconductor memory array comprising gate-addressable MOS semiconductor transistors, preselected enhancement semiconductor transistor devices are rendered permanently non-conductive by a combination of one or more mask and process steps in order to suppress the channel conduction of certain of the MOS semiconductor devices selected in accordance with a predetermined bit pattern. For example, MOS drain contact windows may be omitted at preselected semiconductor devices in order to keep these devices from conducting.
However, a denser array may usually be achieved by the use of merged or common drains for two or more MOS semiconductor devices. In this case omission of the drain contact suppresses channel conduction in all of the common-drain devices which is not likely to be in accordance with a desired pre-determined bit pattern. Since the customer demand for any particular bit pattern changes with the application, it is desirable to be able to modify the bit pattern as late as possible in the semiconductor fabrication sequence in order to be able to provide quick turn-around response to customer needs and schedules. Additionally, by being able to customize the desired bit pattern as late as possible in the semiconductor fabrication process, this permits a manufacturer to process a large amount of semiconductor wafers up to the step in the process where the customization of the bit pattern is carried out. This enables the manufacturer to be able to place into inventory almost completed semiconductor wafers ready for rapid customization and completion.
Accordingly, there has been a need to provide a high-density MOS ROM array which may be mask-programmed late in the semiconductor fabrication process sequence in order to facilitate cost-effective fast-response manufacturing.